Synchronous DRAM (SDRAMs) are here to provide you with the speeds and bandwidths to
meet the system challenges of today's high speed microprocessors. As the bus clock exceeds
the 66Mhz barrier, the need for the EDO and FPM memory to wait for the memory to locate
the address for reading or writing becomes more evident. Since all the address, data and
control are synchronised to the system clock, SDRAM is able to give you a zero wait time
performance as compared to EDO and FPM DRAM at higher frequency. Using the same DRAM core
technology, SDRAM performance/cost exceeds that of the EDO and FPM DRAM. With the
operating speed of 67MHz/83MHz/100MHz/125MHz, SDRAMs are a sure winner to provide you with
the speed that is needed by your system.
Advantages of using SDRAM:
Provide a good upgrade path for future generation microprocessor and SDRAM
Cost-effective as it uses the same DRAM core technology
Ease of use.
Widely supported by core logic chipsets, MPEG-2 chipsets, graphics chipsets, set-top-boxes, ATM systems and DVD systems.
Multiple sources and JEDEC Standards. And Intel's PC-100 standard.
1. Next Generation Memory and is synchronized to the system clock.
2. Control Command
3. Mode Register
4. Burst Mode
5. Two Banks or Four Banks Architecture
6. Cas Latency
1. Next Generation Memory and is synchronised to the system clock. All the inputs and
outputs are all synchronised to a system clock and this makes the system design simple.
This is based on the use of a simple state machine operation.
2. Command Control The access is programmable and controlled by /CAS, /RAS, /CS and /WE signals and is synchronised at the rising edge of the external clock.
3. Mode Register SDRAM contains the mode register that sets the length of data (burst length) to be continuously accessed in the burst transfer mode. The register is also used to set the burst type and CAS latency.
4. Burst Mode Internal pipelining provides burst access, allowing continuous input and output of data. SDRAM has a built-in counter which counts up the column addresses for the burst access. The burst length and burst type are controlled by mode register. Burst length - the number of data ( words) continuously input and output can be selected from 1, 2, 4, 8 or full page* (depending on model). Burst type - the sequential type (for Motorola MPU) or interleave type ( for INTEL MPU).
5. Banks Architecture SDRAMs have more than one bank architecture and can operate independently. This allows one bank to be accessed and the other is being precharged. This totally eliminates the precharge latency and effectively allows bandwidth to be increased.
6. Cas Latency Latency is the number of clocks from when a read command is input until the first data is read. It can be selected from 1,2, or 3. It is an importent factor when we are talking about speed, so when you buy, always ask what cas latency is on the module.